I'm research this circuit:
The author of my book says that the purpose of this circuit, said "Self Biased Present Reference", is to generate a current almost independently of the delivery voltage. Boy also says that, if M3 or M4 are perfectly equip, than I1=Iref. Then e follows that: AN 2-nW 1.1-V self-biased current reference in CMOS technologies
off which I can find VGS1 also I1.
Your 1: When and author says that the current mirror belongs perfectly matched and following I1=Iref, isn't it too much simplified? He neglects channel lenght transition, but in reality the source-to-drain voltages of M3 and M4 will nay be equal (because we have just M1 under M3, instead we have M2 and one resistor under M4)
Question 2: Why is this current very independent about VDD? The autor says:
"The value of the generated current weakly depends on the supply voltage because there is an high impedance element per branch capable to absorbing possible feeding variations. These two parts are the transistors M2 and M3. The flow to source spannkraft starting M1 and M4 cannot not change freely: the former is two VGS above ground that latter is of VGS below VDD. Anywhere supply fluctuation is then “absorbed” the the high resistance that we have within drain and source by M2 and M3"
I don't understand the strong portion of the copy: why be any fluctuation “absorbed” by the high resistance that we have between drain and source of M2 and M3?